An Ultra-Area-Efficient 1024-Point In-Memory FFT Processor

Micromachines
Hasan Erdem YantırKhaled Nabil Salama

Abstract

Current computation architectures rely on more processor-centric design principles. On the other hand, the inevitable increase in the amount of data that applications need forces researchers to design novel processor architectures that are more data-centric. By following this principle, this study proposes an area-efficient Fast Fourier Transform (FFT) processor through in-memory computing. The proposed architecture occupies the smallest footprint of around 0.1 mm 2 inside its class together with acceptable power efficiency. According to the results, the processor exhibits the highest area efficiency ( FFT / s / area ) among the existing FFT processors in the current literature.

References

Dec 1, 1986·Magnetic Resonance in Medicine : Official Journal of the Society of Magnetic Resonance in Medicine·J HennigH Friedburg
Jul 21, 2005·Magnetic Resonance in Medicine : Official Journal of the Society of Magnetic Resonance in Medicine·Mary Preston McDougall, Steven M Wright
Oct 4, 2018·The Review of Scientific Instruments·Limin Li, Alice M Wyrwicz
Jun 5, 2019·Micromachines·Giulia SantoroMariagrazia Graziano

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Citations

Jul 2, 2020·Micromachines·Hasan Erdem YantırKhaled N Salama

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Methods Mentioned

BETA
chip
chips

Software Mentioned

Matlab
Cadence
HSPICE

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